SK hynix will keep its current memory bonding method for HBM4E chips, delaying hybrid bonding until HBM5. The decision matters because it exposes a physical limit on how much memory can be stacked for Nvidia's next generation AI chips, affecting how fast AI hardware can advance.
What actually happened
According to Tom's Hardware, SK hynix says hybrid bonding will not be ready in time for HBM4E memory chips. The company will extend its existing MR-MUF bonding process through Nvidia's Rubin AI chip platform instead. The reason is a physical constraint. HBM memory cubes are capped at a total thickness of 775 microns. That figure matches the standard thickness of a single 300mm logic wafer, according to the report. SK hynix plans to introduce hybrid bonding with its next generation HBM5 memory, rather than with HBM4E, the outlet reported. The report did not include a specific timeline for HBM5 production or hybrid bonding's expected debut.
How we got here
HBM chips stack multiple memory dies to boost bandwidth for AI accelerators. SK hynix currently joins these stacks using its MR-MUF process, an established method already used in earlier HBM generations. Hybrid bonding was widely expected to arrive with HBM4E, the generation feeding Nvidia's upcoming Rubin platform. Instead, the 775-micron thickness ceiling, equal to one standard 300mm logic wafer, forced a change in plan, per Tom's Hardware. SK hynix will now carry MR-MUF through the HBM4E and Rubin era, saving hybrid bonding for HBM5.
Why this matters for you
For AI chip buyers, this means Nvidia's Rubin generation will ship with today's proven bonding method, reducing supply risk but capping memory density gains. For memory makers, it shows physical packaging limits, not just process nodes, now shape the roadmap. For builders tracking AI hardware for wearables and AR glasses, denser memory remains a bottleneck until HBM5 hybrid bonding arrives. Investors watching memory suppliers should note the delay affects timing, not direction, of AI memory scaling. None of this changes near term AI chip supply, but it sets expectations for when denser memory becomes available.
The bigger question
If physical thickness, not manufacturing yield, now caps AI memory density, how much longer can stacking alone keep pace with rising AI compute demand before a new packaging design becomes necessary? This question extends beyond one company. Every AI chipmaker relying on HBM faces the same physical ceiling, from data center GPUs to future edge devices that could power AR glasses and wearables.
What to watch
Watch for SK hynix's HBM4E shipment timeline alongside Nvidia's Rubin platform launch, and any update on HBM5 hybrid bonding development. No official dates were disclosed in the report. Future statements from SK hynix, Samsung, and Micron on packaging technology will show whether this 775-micron limit becomes an industry wide constraint.
